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time delay circuit/component

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mourilo

Aerospace
Joined
May 13, 2003
Messages
7
Location
CA
hello, I need help.
In my circuit I have a square wave output and need to delay it by 10ns. Do you have any idea how could I do that?
thank you very much
 
How accurate does that 10ns have to be? Can you get away with putting in a non-inverting buffer?
 
You can use a monostable circuit to generate your required delay.
 
Depending on your application, well, it seems to me that putting in about a meter of wire on your output would delay the signal by about 10ns and could be about the cheapest, easiest, lowest-power & most reliable delay circuit you could build. And field tuning would be a snap, all you'd need is a pair of wire cutters.
 
Thank you very much for your ideas..it's great
 
Actually it would be about 7 feet. Suggest use an RC with a buffer.

<nbucska@pcperipherals.com>
 
or add unused inverter gates in series to accumulate delay. The wire thing can create localized noise depending on your application.
 
Or you could just buy an analog or digital delay line. As was mentioned before, important information is how accurate you need the delay to be.

And also how much distortion of the input signal is allowed. All circuits change their inputs to some extent, although plain resistors don't change the shape much.
 
Could just use an RC network, depending on the application being dependant on a threshold voltage or not.

:-)
 
For a delay of only 10ns I would not recommend either a monostable or an RC as has previously suggested owing to the very small capacitor that would be required. The time delay from such a small capacitor would be easily influenced by circuit board stray capacitance and thus give an unpredictable result.

Assuming your square wave comes from a logic circuit, the best solution I have found is to use one or more non-inverting buffers, or an even number of inverting gates, to get the desired delay. This is usually quite stable with temperature, but does tend to vary slightly from board to board, depending on the individual logic chips. If you really need to get the delay consistent between units, this can be arranged by having a &quot;select on test&quot; tapped chain of gates.
 
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