Once the contacts in the case of a BGA become inaccessable to direct probing at the part, which is sometimes necessary to determine an open circuit condition, or even a short, the Joint Test Action Group got together and thought it would be nice if the designer still had access to as many nodes as possible. They implemented a simple shift register topology which basically placed an aditional bidirectional gate along side of existing pins in these parts. In some of the microprocessors I have worked with these shift registers have turned out to be any where from 100 to 800 bits long. These shift registers are controlled by a simple standard JTAG or IEEE 1149.1 state machine controlled by a minimum of 4 pins on the part. This allows the user to discretely exercise a pin on the part and see how the rest of the world sees the assertion. One example that I have used very effectively is examining for shorted nets, either to each other or to a voltage rail of some sort. Additionally, If you have other JTAG compliant chips that happen to be connected to nets of another JTAG chip, you can easily confirm assertions not only from one parts perspective but also from others, all without the use of several hundred test points or more. Test points can take up a lot of board space as you know. All of this can be done for as little as 4 control points for the JTAG port interface itself. I would swear by this test methodology, and have used it succesfully several time now. My new CM wants to use it as well, they have several years of data now which proves that JTAG type testing can increase production reliability for very little board real estate. If your curious at this point somewhere on TIs web site they still have a really good and simple DOS based JTAG tutorial. It will run in a DOS shell under windows too.
good luck,
stelleb
