Arc Flash advice needed plse 2

[veritas]

A client has a 22kV swbd fed by 2 x 50MVA, 11% trfrs in parallel. The swbd has an internal arc flash rating of 25kA for 1s. The actual three phase fault level is 19.2kA and each trfr will trip in 1.56s.
I am concerned that the tripping time is too long and that the arc flash integrity will be violated for an actual 19.2kA fault. How do I quantify this?

I have considered using I1^2*t1 = I2^2*t2 with I1 = 25kA, t1 = 1s, etc. and get t2 = 1.3s. Clearly not good enough! But is this the correct formula to use for AF faults? If not how does one calculate t2? I have always advocated that if the plant rating is x seconds then the protection must clear the fault in x/2 seconds.

I have been advising the client to spend some money on buszone protection but it is an uphill battle. The dollars speak louder than anything else unfortunately.

Thanks.

 

[jghrist]

You cannot make any assumptions or calculations on the arc flash rating at lower current and longer clearing times. the switchgear arc flash rating has to be verified by type testing. Unless you can get the manufacturer to verify the lower current/longer time rating, you have to assume the switchgear will not be arc resistant.

 

[ScottyUK]

25kA / 1 second sounds like a fault withstand rating, not arc flash capability. Certainly it is long by European standards. Can you confirm?

 

[veritas]

Hi Scotty

Manufacturer's data attached.

Regards.

 

[ScottyUK]

Thanks - that's useful to know.

 

[ppedUK]

Veritas,

You say that the transformer will trip in 1.56s, which implies that you are relying on the primary protection for fault clearance (arcing or short circuit)? I would expect a switchboard of this rating (and in parallel) to have some form of O/C protection fitted at the incoming breakers and on the Bus Section breaker, and if that's the case can you not introduce a STPU characteristic on the incomer and bus section protection relays and set a delay time of less than 1s?

Transformers of this rating would normally have high speed diff protection or directional protection with a set of CTs fitted at the switchgear, which would at least cover the circuit side of the incomer breaker in the zone of protection. You would then protect the busbar side (if you do not have bus zone protection) with the O/C protection on the incoming breakers and bus section breakers, and if necessary, introduce a STPU to reduce the arcing time and AF incident Energy.

I agree that Bus Zone protection would give faster fault clearance, but as is quite often the case, if they are not willing to spend the money, you have to use whatever you have at your disposal.

Scotty,

I work at a plant where they have switchgear with an IAC rating of 50kA/1s - category AFLR. A 1sec IAC rating is not unusual in switchgear built to EN62271.

 

[ScottyUK]

Thanks ppedUK. Much longer than the LV tests, which are limited to 300ms. I hadn't read the first post properly when I initially replied and missed that it was MV gear.

 

[veritas]

ppedUK

The trfrs have X and Y (or Main 1 and 2) differential protection, as you correctly stated, with the 22kV diff CT's being on the incomer. The OC function also reside in the diff relays and use the HV CT currents. I'm not a proponent for LV OC on trfrs. LV EF yes, most definitely.

HV OC can detect the same faults as LV OC and on top of that I can use a hi-set def time OC element to look into but not through the trfrs. This HV OC INST element supplements the diff.

The HV OC IDMT function has to grade with the downstream protection and as such an OC def time or STPU (more of an LV CB term as far as I know) element is not possible. The bus-section has OC as well which grades with the HV OC relay. I wanted to implement a busbar blocking scheme using IEC 61850 (works very nicely on a previous job) but of course costs! - though much cheaper than a high impedance and cheaper and smpler than a conventional blocking scheme using hardwiring.

If there's any other way of reducing the OC trip time I'm all ears.

Thanks.

 

[ppedUK]

Veritas,

It is possible to set the HV O/C to look "through" the transformer, but accepting that this then has to grade with the downstream O/C protection, which is why it is normally set above the LV through fault Ik.

I'm guessing that this a reasonably new installation, given your switchboard spec. and assuming that the diff relay is a multi-function microprocessor relay? That being the case, then you could set an LV D.T. overcurrent setting in the relay (and yes I know you're not an advocate of LV O/C protection), but again accepting that this should normally grade with downstream relays.

This may be one of those installations (and I've had a fair few!) where you have to use LV O/C and get the client to accept a compromise between ideal grading and incident energy limitation (if that is your aim), or look at the whole system settings again. It all comes down to risk again, if this is in a nuclear power plant then the loss of the board due to mis-coordination may present a greater risk than burning a hole in the board (hopefully whilst no one is in the switchroom!).

Just as an aside, when I am asked to carry out an AF study on IAC rated switchboards, I still recommend wearing the correct calculated AF PPE for racking operations etc, even where the gear is IAC rated with closed door racking.

 

[veritas]

I posed the question to the swbd manufacturer:

The 22kV .... switchgear used for the ... project has an Arc Flash rating of 25kA for 1s. What I need to know from you is if my fault current is lower say 19kA what is the AF withstand time now? Is there some formula to calculate this?

Their reply:
There is no formula to calculate the AF withstand time for less than rated figure. It is recommended to have same time duration as specified.

This means the swbd is in trouble. Ordinarily, I would desire a trip time of 0.5s for some margin of safety. I mentioned this issue to the client months ago. What he then did was to use a 2nd settings group which has the HV OC INST functio look right through the trfr whenever "test for dead" is done on the swbd. The HV OC INST function has no time delay and brought the AF Category down from Dangerous to 3 according to NFP70E.

Now this is all good and well for the very short time period when someone is teting for dead. But what about all the other times? What's the point of having the AF rating if your trip time is so long?

You are correct - new installation, microprocessor based relay.