Interpreting logic level for level translator SN54SLC8T245-SEP
Interpreting logic level for level translator SN54SLC8T245-SEP
(OP)
Hello all, I plan on using SN54SLC8T245-SEP for level shifting of single-ended signals from 1.5 V to 1.8 V, 1.5V to 3.3 V, 1.8 V to 1.5V and 3.3V to 1.5V. First time using level translators for mostly SPI interfaces, so I would like some guidance. I am having difficulties interpreting the logic voltage and current characteristics so that I can determine compatibility between devices, specifically the VOH, VOL, IOL, IOH, IIL, IIH, as it pertains to my application. I appreciate any input.
From the datasheet I have determined that the following, which I hope is correct:
VIL (max): 0.63V (Vcc = 1.8V) or 0.8V (Vcc = 3.3V)
VIH (min): 1.17V (Vcc = 1.8V) or 2V (Vcc = 3.3V)
Reference datasheet: https://www.ti.com/lit/ds/symlink/sn54slc8t245-sep...
From the datasheet I have determined that the following, which I hope is correct:
VIL (max): 0.63V (Vcc = 1.8V) or 0.8V (Vcc = 3.3V)
VIH (min): 1.17V (Vcc = 1.8V) or 2V (Vcc = 3.3V)
Reference datasheet: https://www.ti.com/lit/ds/symlink/sn54slc8t245-sep...