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SDLC -> Aynsc RS232 Conversion

SDLC -> Aynsc RS232 Conversion

SDLC -> Aynsc RS232 Conversion

I looking for the chepeast/easiest way to sniff an SDLC link (synchronous RS232) and capture the data using an asynchronous RS232 serial port on a normal PC.
Any feedback/input would be appreciated. Thanks

RE: SDLC -> Aynsc RS232 Conversion


Would you know of an IC/Serial Controller that would not only convert from sync -> async but also extracts the data only from the SDLC frame.  If not, software residing on PC will have to deal with start/stop flags, CRC check etc..

whats ur opinion on this:
in conjunction with a microcontroller.

Thanks again

RE: SDLC -> Aynsc RS232 Conversion

Hello Again,

There maybe but I havn't come across any (but I'm no specialist). I suppose it would depend on the format of the Sync data.

As far as start/stop bits well thats a funtion of async reception anyway so if your using a PC then you wouldn't need to strip them. If your sysnc data doesn't use them then that IC will add them. As for some form  of error control ie CRC, Byte Parity etc, well if this is sent as a word during sync transmission then this would need to be handled by software. You may also need to regard flow control (mind you if your sniffing it may not matter).

One thing I neglected to mention of course was signal level conversion. This would depend on the mode of transmission of the sync data (Balanced/TTL etc). As for RS232 to the PC then the MAX232 does a good job without the need for messy +/- supplies. So a system would be along the lines of Device-->Sync Levels-->TTL-->Conversion IC-->TTL-->232-->PC

All that aside if you can program and use microcontrollers the whole lot can be done with one of them & a level converter. I use 16F87Xs for speed,ports and price.

As for the Zilog IC wow thats some PDF, and will require some study.


RE: SDLC -> Aynsc RS232 Conversion

Aprreciate your input..

I am heading towards using a Motorola uC (MC68302) that has a couple of Serial Communications controllers. It can be programmmed so that one of the SCCs is used for synchronous data capture (SDLC protocol) and the other will send out asynchronous data. Level shifters will be required on either end. Seems like should do it with minimal effort.


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