Piezo effect in ceramic capacitos
Piezo effect in ceramic capacitos
(OP)
I'm using ceramic capacitors in an application where they have to supply high pulse currents at a repetition rate in the audible frequency range (several amp for about one microsecond out of an 1uF X7R surface-mount capacitor). When I operate my circuit I can hear a humming sound generated by the capacitors on the board.
Manufacturerer's application notes describe this effect and warn that this may cause damage to the components but they do not provide a way to calculate a limit for this kind of stress. The thermal load on the capacitors is much below critcial values due to the low duty cycle.
Does anyone have useful information on this effect either from literature or from own experience ?
Manufacturerer's application notes describe this effect and warn that this may cause damage to the components but they do not provide a way to calculate a limit for this kind of stress. The thermal load on the capacitors is much below critcial values due to the low duty cycle.
Does anyone have useful information on this effect either from literature or from own experience ?
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RE: Piezo effect in ceramic capacitos
Robert A. Pease makes a brief mention mention of the piezoelectric effect in his book Troubleshooting Analog Circuits, page 45.
"High-K ceramic capacitors also can exhibit piezoelectric effects: When you put a good amount of AC voltage across them, they can hum audibley: and if you rattle or viberate them, they can kick out charge or voltage. (Other types can do the same thing, but high-K types are worse.) Be careful when using these capacitors in a high-vibration environment"