sharing signal and power ground 1

[E2005]

I generally share the signal and power ground together for analog(and mixed circuits <1 KHz).Does this practice introduce noise in the system. The circuits many times does not work if I separate them, so I am forced to do it to make it work. Am I missing something about designing here.

 

[Noway2]

E2005,

When designing a mixed analog and digital system, circuit layout becomes one of the many important factors influencing the level of noise in your analog circuitry.

Generally, it is best to separate the analog and digital regions of your circuit board to avoid interference from the 'noisy' digital switching. When separated, the regions are often times connected at one location, typically as close to the ADC as possible. I would also suggest that the analog power should be separated from the digital power and filtered. The purpose of connecting the regions at one point only is to prevent current from flowing between the regions and inducing noise. You also want to make sure that no traces are passing over the gap in the reference planes.

You indicated that when you separate the analog and digital regions that your circuit often times does not work. In what ways does it not work and how are you separating the areas that causes it to not work?

 

[melone]

I have to disagree. Nowadays, it is almost a requirement to have a good, solid ground plane. This is due to return path currents. The ground leg of the current path will attempt to travel in the lowest impedance path back to it's source. This is accomplished by following the same path that was supplied, via the ground trace / plane of course. This means, that if you do now allow the current to return "under" the same path that it was supplied, you are increasing the impedance of the path. This is where ground bounce comes from.

Since the "purely digital", "purely analog", and "purely RF" IC's are talking to each other, there will be return current losses if you force the current to go through a "small", non-ideal path (seperate ground planes connected at a "point").

If you are concerned about noise on ground, you can do 3 things:

1) You part placement to your advantage. That is to say don't place sensitive components in the immediate vicinity of the "noisy" components.

2) Beef up your ground plane. Make your ground as thick as possible. Perhaps define your board stackup to allow for a thicker inner core for ground. For example, a 4 layer board can be defined to have 1 oz. copper on the inner layers and 0.5 plated to 1 ounce copper on the outer layers. (I believe I have seen this done..)

3) Add extra via when changing layers (esp. when connecting to ground with noisy caps). Adding extra vias will decrease the impedance (especially the L component). This will help minimize the drops associated with the layer transistions.

It is my opinion, that ground should be as thick and as contiguous as possible. Splitting the ground plane often causes MANY more headaches than it solves.

 

[Noway2]

Clearly there is no one right or wrong answer to this or any other design problem.

Melone, It sounds as if your architecture and layout calls for having digital signals run into or through your analog regions. I can see how this can happen if you have control circuitry in your analog regions. I agree that if you force a number of signals or the return currents for those signals through a small area you can get A - cross talk, B ground bounce.

The grounding technique used would have to be based upon the system and IC architectures. If you are able to avoid having digital signals passing through your analog region, I would still have to recommend partitioning the reference planes and tying them at one point only to avoid current flow between the regions. If this can't be done, things get more complicated.

E2005, I might suggest the following link for some information on this topic:

http://www.sigcon.com/pubsIndex.htm#grounding

 

[E2005]

I have been designing more like what 'melone' says but wanted to find out if there are advantages to seperating the signal and power grounds.
A recent need for me was controling power by pulse width modulation through a mosfet. I had to common ground the circuit supplying gate signal and source pin on mosfet(The power from drain to source was controlled through the gate).Here the signal ground and power ground had to be connected together

 

[itsmoked]

E2005 Those are both in the 'logic" realm so it's okay to connect them together. You would definitely want the "return" from that fet to be short if possible.

 

[Warpspeed]

The guiding principle is that voltage drops in the ground only occur where there is current flow. Analog circuits generally are low power with minimal earth return current and induced noise is not usually a problem. Digital, RF, and higher power circuits can have significant ground return noise current flow and can create problems. A lot also depends on how large the system is.

If it is a single individual PCB, it is feasible to have one or more ground planes that solidly tie everything together with minimum impedance. That is the easy way.

But you may have a large card cage of several different types of boards, or even a whole rack full of miscellaneous interconnected circuits. It is then that some really serious thought needs to be given to the entire grounding strategy right from the outset.

There is no simple answer, but in theory, everything should be referenced back to a single ground reference point. None of the signal reference grounds should carry any current, but the power ground returns obviously will.

For very large complex distributed systems a star ground system going to one point is the only feasible way to do it. Keep noisy power ground returns and clean signal reference grounds separate and join them only at the central ground reference point.

 

[zappedagain]

" The circuits many times does not work if I separate them, so I am forced to do it to make it work. Am I missing something about designing here."

A mixed-signal IC will typically tie the GNDs 'together' somewhere within the IC; i.e. some circuit will reference both, or parasitic transistors can reside between Analog GND and Digital GND. Thus if you end up with more than +/-0.5V between analog GND and digital GND (watch for 'intermittent' GND bounce) you can start to disturb the bias circuits and the IC won't function properly. Even worse you may end up with a return path through another pin instead of GND and that can damage the part.