iop995; I didn't try any R in the fet's D or S yet.
ijl; Wow! Thanks for the effort. I too am using a constant voltage instead of a DAC in this study.
When I added the large gate resistor it didn't fix the leading edges and added the small overshoot you show!
LionelHutz; I haven't checked the comp and should have, but, I also, on my first sketch, failed to notice that I DID actually have the negative spike too. It was a bit buried by the cursor bar. However you'll see in the pics below that I can get rid of one of them so I don't think it's scope comp.
Skogs: Nope no looking glass.
Hi Mike; I see looking at the data sheet 1v/us. Why are you saying a faster one would cure this? Is it that the amp would respond faster and hence would allow it to correct the overshoot? I could use a 50 cent amp without a problem. As for the cap 'solution' see below.
All;
Here's a picture of the unchanged situation as not completely drawn correctly. Note the negative glitch too.
ASIS
Here's the large gate resistor as suggested. Note, no real improvement but now the trailing spike shows up.
LGR
I tried many caps across Rf. None did much until I got up into 10,000pF which is shown here where it wiped out the negative one but also threw a wiggle into the trailing edge.
CAP
Turned out I didn't have an 4066 laying around even though I turned my lab inside out looking for one. I did lay this all out in the product with provision for an Rf cap and using the 4066 so we'll see if that does the trick after I get the boards back. Seems charge injection has been argued out of contending anyway.
Keith Cress
kcress -