increasing an A/D's range 4

[zappedagain]

We have a channel with a 16-bit A/D and a 2.5 Vpp range (38uV/count). There is an unused channel available on the same board so a colleague has suggested increasing the signal and using one A/D for the top half and the other A/D for the bottom half. The software then has to stitch everything back together. Is this standard practice, or are there some gotchas?

Here are the catches that I've thought of so far:

- With one A/D offset for a range of 0V to +2.5V and the other A/D offset for a range of -2.5V to 0V, A signal swinging +/-2.5V will swing outside the absolute maximim ratings of the input. I can get around this by clamping the inputs for each A/D and careful setting the clamping current.

- Once I clamp the inputs, I'll need time to come out of saturation. When I have a fast change (high dV/dt) this will effect my transition from one A/D to the other. As long as the recovery time is fast enough, I can get around it by overlapping the A/D ranges. So maybe I offset one A/D with a range of -0.5 to 2.0V, and the other A/D with a range of -2.0V to +0.5V. As long as I'm out of saturation before the signal changes by 1.0V I'll still have quality data.

- The offset voltage will need to be very clean. Otherwise it will degrade the signal to noise ratio.

- The A/D must be have enough gain before it that the additional gain won't degrade the overall Noise Figure.

So now I have 38uV resolution and a range of 4V. That is the equivalent of 104858 counts, 60% more range than I started with at 65536 counts over 2.5V. It isn't much in terms of bits (16.678) but I do have 60% more range. While adding an entire second channel doesn't seem very efficient, if it running unused, why not?

Am I missing anything?!?

 

[Skogsgurra]

That may be an interesting thing to do - but do not expect much success. If your only problem is that you cannot use one of the AIs, then I think you should forget it.

Range can be increased much more efficient with a voltage divider - you know that - and if you need more resolution, a simple SW filter can take care of that. It does reduce your BW, though. Is that acceptable?

Gunnar Englund

http://www.gke.org

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100 % recycled posting: Electrons, ideas, finger-tips have been used over and over again...

 

[zappedagain]

Thanks skogs, I forgot to mention that we are investigating a variable gain channel (automatic, possbily). This came up as a possible alternative. I have to think if it is worthwhile for about a 4 dB improvement.

 

[IRstuff]

I would think that a difference amp and a D/A for offsetting would buy you a lot more.

TTFN

Eng-Tips Policies FAQ731-376

 

[itsmoked]

You will be zapped with awful calibration headaches with your two A/D device scheme. You will also have a nonmonotonic area around zero. How will you know which A/D the signal should be read from? Two A/Ds is going to cost twice as much. More noise, more board area, more power, more heat, more traces.. I think you'd be better off not going that way.

Keith Cress
Flamin Systems, Inc.-

http://www.flaminsystems.com

 

[VEBill]

In addition to all the other good points, the proposed approach (being 'messy') would most likely result in a lower SNR than the 96dB (in theory) available with a clean and simple 16 bits.

 

[felixc]

Depending on the acquisition time that you need for your signals, I have seen some products successfully adding a small triangular wave to the voltage reference inputs. The variance of the measurements allowed to interpolate between the bits. In your example a reading of 19uV would read half the time at the upper bit value and half the time at the lower bit value, thanks to the offsetting of the references. The time average would let you get the right value.

 

[zappedagain]

Thanks for the sanity check, everyone. I won't lose any sleep over this idea tonight!

Z

 

[logbook]

Trying to make your own ADC like this is a non-starter, as sugggested by the other posters. However I have a really neat idea for you. Wire the two ADC channels in parallel and average the data. Since the DNL and INL errors of the ADCs will not be identical, the summed result should give better INL and DNL. Also the result should be less noisy.

Felixc is suggesting dithering and oversampling. This is a valid technique, but loses bandwidth. By averaging the two data streams you do not lose bandwidth and get a sqrt(2) improvement in the noise.

 

[zappedagain]

Log - that's true. That's a much more reliable way to get half a bit on the bottom end instead of trying for 0.6 bits on the top end!

 

[Skogsgurra]

Beautiful, log! PLS.

Gunnar Englund

http://www.gke.org

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100 % recycled posting: Electrons, ideas, finger-tips have been used over and over again...