designing a DAC 3

[ryanjep]

I need to design a DAC for a work experience project and i hope someone can help, it is an 11 bit DAC, but here is the problem:

D to A function

The D to A function is not binary weighted across all 11 bits. That is a true 11 bit DAC would have 2^11 sates (2048), where as this 11 bit DAC has 127 states, that is 7 bits. The tables below try to explain this.



Segment D0 D1 D2 D3 D4-0 D4-1 D4-2 D4-3 D4-4 D4-5 D4-6

Weight 1 2 3 4 16 16 16 16 16 16 16


(Example)
State 58
Segment D0 D1 D2 D3 D4-0 D4-1 D4-2 D4-3 D4-4 D4-5 D4-6

Weight off on off on off off off on on on off


The first block shows the 11 bits with their respective title. Underneath we see the corresponding “weight”. As one can see the first 4 bits are binary weighted, however the final 7 bits all have a weighting of 16. The remaining boxes show what bits are high for specific weight. Therefore it is not as straightforward as placing an 11-bit DAC on the test board as the output weighted values would not be correct.

Any suggestions, thanks in advance.

 

[walker1]

It looks like you are trying to create some sort of a logarithmic converter with a 4-bit mantisse and a 7-bit exponent.

Or have I misunderstood something ?

 

[ryanjep]

Well it's an 11 bit DAC, but the problem is that it is not binary weighted, only the first four bits are binary weighted, the rest have a weighting of 16., if i was to use an 11 bit DAC on the test board the output weighted values would not be correct.

 

[BrianG]

What is the application of such a peculiar DAC? Having the top 7 bits of the same weight will give a non-monotonic response - or is that required for some special purpose?

If you really want that kind of response then I suggest a four-bit DAC with regular binary weighting (1-2-4-8), plus a seven bit latch with each output sourcing a current of weight-16. These outputs could then all be summed by an op-amp. BUT it may be better to have successive summing stages, i.e. one op-amp for the binary outputs, one which sums the 16-weight outputs, and a final one which sums both. That way you can trim the individual gains more easily.

 

[ryanjep]

It will be used to convert digital envelope information into an analogue signal to enable debugging of the envelope path of RFDAC test boards.

 

[IRstuff]

As you may recall, one configuration of D/A essentially uses a ladder network to sum currents into an output current summing node. Therefore, the first 7 bits can be built that way, while the remaining 4 bits simply cause the summing of 16weight current into the same summing node. This is finished off with the output amplifier that converts the current into voltage.

TTFN

 

[ryanjep]

Its the first 4 bits that are binary weighted, and the final seven bits have a weighting of 16.
It would be very helpful if ye could go into more detail as to how i could get the output weighted vaslues to be correct.

 

[BrianG]

The first thing you need to decide is the value of the weight of 1 bit, as a current. For example purposes, if you decided on 1mA per bit then the equivalent currents would be 1-2-4-8 mA for your first four bits. The next 7 bits would each be 16mA, so that the total of all 11 bits at logic "1" would give a total of 127mA.

Depending on the accuracy you require you don't need a special D-A chip; you can make a reasonable D-A out of latches with different values resistors into the op amp summing junction. If you use CMOS latches to give a good logic "1" level of close to +5V, provided the resistor currents are not too large (say 100uA steps, rather than 1mA) you can get quite good results this way.

As currents are summed at the op-amp - remember that the input is a "virtual ground", assuming 5V available from the latch o/p then Ohms Law gives the value of each resistor, e.g. 50K, 25K, 12.5k 6.25K, making the 16-weight value 3.125K.

All you then need to decide is the value of feedback resistor at the op-amp to get the scale maximum voltage required, e.g. 3.9k will give approx 5V full scale.

Hope that helps!

 

[BrianG]

WHOOPS - doing the maths in my head as I typed, I made the feed back resistor too large by and order of magnitude. It needs to be 390 ohms for a 5V output range. That may be a bit on the low side for some op-amps to drive.