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500-1000 Mbps pulse counter

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zappedagain

Electrical
Jul 19, 2005
1,074
I have a laser generating a pulse every 20 nS. Occasionally it will generate an extra pulse, so I'll have a packet of two pulses repeating every 20 nS. The second pulse in the packet will have a random delay after the first pulse; successive packets will keep that same delay.

I want to make a pulse counter to detect this condition. A counter that can run at 500-1000 MHz will be adequate. What type of architecture do you recommend?

Is ECL still available? I'd only need the first couple of stages to run very fast, and then I could use slower logic.

What about a fast FPGA? I see some that clock over 500 MHz and others supporting 1.25 Gbps serial ports. It seems like a bit excessive, but keeping everything in one IC might be simpler.

Any other suggestions?

Z
 
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You just want to catch this on a single setup, or is this to be a part of your product?

ECL is very rare now. A lot of stuff is as fast or faster now with less electrical complications,(split supplies), and dramatically less power consumption.

A really small FPGA or possibly a CPLD would probably work well.

What are you going to use to convert these pulses to electrical pulses you can count and track? A diagonal glass plate(?) deflecting to what sensor that is fast enough?

Keith Cress
kcress -
 
A large protfolio of ECL is available from ON Semiconductor.
Concerning "ease-of-use" I disagree with Keith. ECL is nice because it has constant current consumption and thus does not make supply decoupling as difficult as with hard-switching logic like CMOS.
There is no problem running ECL on a positive supply.

Best Regards,

Benta.
 
If each pulse contains the same energy, then the condition where it is emitting double pulses it should be emitting double the energy. Should be simple to detect a 2:1 increase in output. For your consideration (there's a thousand reason why this may not be applicable to your situation).

 
I plan to include this as part of the product. Unfortunately I'm stuck with an sometimes unstable laser at this point so I need to be able to detect the double pulse. Hopefully as time progresses we'll be able to figure out another band-aid to keep the laser stable.

I have a high speed photodetector available that is tapping off a small portion of the laser power.

I believe the single supply ECL is called PECL. A voltage divider for the termination sets up the proper bias. I'll check that out.

Each pulse ends up with 50% of the energy, so the energy content stays the same. IF I had an extremely fast peak detector I could see the difference. A slower detector will see the same average energy.

I realized that only the first stage of a counter needs to run this fast. By the time I get to the second bit it will only be toggling at 25 MHz. Maybe an ECL flip-flop followed by a slower speed FPGA/CPLD is the trick.
 
Consider an ECL Prescaler like a Phillips SA701 (1.1 GHz).
 
Z,

Are the pulses themselves the max power for the laser (extremely high power pulse, very low duty rate), or are these pulses merely tickles to keep the tube ready for a full blast? Is the main power supply creating the pulse using internal circuitry, or is it through an applied digital signal attached to the supply? Is this a high-voltage DC supply or RF-excited laser?

A leakage in the HV DC path might lead to an extra pulse from time to time as the energy builds up. Any signal leakage back to an external controller board could also lead to an extra pulse from time to time, particularly due to poor/incomplete grounding.


Dan - Owner
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The NXP website reports that the SA701 is discontinued. They say it is compatible with Motorola MC12022. The On web-site says the MC12022 is discontinued and replaced by the MC12026A. That looks it might be a good solution! It runs this fast with a single ended 50 ohm input. Following it with a CPLD to make the decisions gives me a two chip solution.

This is purely an optical effect from a cavity laser like this one. The pulses are from the laser. As I understand, this laser should passively mode lock to a single pulse stream, but sometimes supports a second pulse stream.

Thanks all!
 
The one thing to watch out for with the MC12026 is that it appears to be a dynamic design (Min freq = 100 MHz as are many of the prescalers). The nice thing about the SA701 was that it was a fully static design that worked down to DC.
 
sreid - I see that about the MC12026. My main pulse stream is a pulse every 20 nS (50 MHz), but the pulses are very narrow (about 1 nS). It will be interesting to see how they get through the channel. I might need 6-20 dB of gain at 1 GHz; that's always fun.
 
If you go for an MC10EL34 instead, you won't have the minimum frequency problem. This will give you a divide-by-8, but is probably somewhat more expensive.

Benta.
 
Doh! I tried an evaluation board on a Centellax UXN6M9P to prove out the concept. Even though the spec claims 'DC' operation the low frequency sensitivity gets so high (i.e. high pass effect) that it started counting the harmonics of my pulse instead of the pulses, so I'd see a 4x or 5x multiplier depending upon my pulse spacing. That was interesting... Nice IC, just not for this application.

Luckily this has dropped a bit in priority, so I'll keep exploring options like the MC10EL34 or the InPhi part. It looks like I may need to cobble a circuit together to test my proof of concept.

Z
 
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