Here are some thoughts (nothing concrete).

Your switch will (presumably) interrupt a load/supply circuit which can be modeled as a series inductor and resistance.

Higher inductance gives worse duty during switch interuption due to higher inductive kick (v=Ldi/dt).

Higher resistance within your circuit tends to dampen the inductive kick somewhat through energy dissipation.  Low resistance within your circuit is the worst case for circuit interuption since the circuit does not dampen it's own inductive kick at all.

Combine the above effects to say that the worst case for switch interuption is high L/R.

The units of L/R are seconds.  If you were to apply a step voltage V to your LR circuit then the current would rise as I=V/R(1-exp(-t/[L/R]).  At time t=L/R the current will be at I(t=L/R)=V/R(1-exp(-1])=v/r*68%=68% of its initial value.  Thus the rise time is simply a measure of the L/R ratio of your circuit.

Suggestion: Beside the dynamical definition of self-inductance in the above posting, i.e. v = L di/dt there is also the energetical definition of the self-inductance L (in Henries), i.e. W = (1/2)(L x I**2) where
W (in Joules or Wattseconds) is the energy of the magnetic field with inductance L (in Henries) and current I (in Amperes). Therefore, any mitigation of arcs across the DC contacts via diodes or Metal Oxide Varistors (MOVs) must consider the energy dissipation and be rated for it.