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ZSI Time Margins 1
- Thread starter AVR_1.0pu
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We have implemented several fast bus tripping schemes - basically ZSI at MV using digital relays. We designed much tighter intervals. The downstream relays will need perhaps a cycle to detect the fault and close a contact signalling the upstream relay to block the fast tripping. I think we allowed a few cycles of definite time delay before tripping the upstream breaker.
At 0.2 seconds, you could probably coordinate without ZSI simply with overcurrent devices, assuming 3 cycle breakers.
But possibly we're talking about different things.
Cheers,
Dave
At 0.2 seconds, you could probably coordinate without ZSI simply with overcurrent devices, assuming 3 cycle breakers.
But possibly we're talking about different things.
Cheers,
Dave
- Thread starter
- #3
Thanks Dave, sounds like an interesting project.
That's great, I'm not so familiar with the internal time delay of the relay itself, I guess you can get it from the specs.
What do you think of these ZSI schemes? Do you think they will become more common place?
That's great, I'm not so familiar with the internal time delay of the relay itself, I guess you can get it from the specs.
What do you think of these ZSI schemes? Do you think they will become more common place?
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