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Dithering Circuit and glitchy multiplexers

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buzzly

Electrical
Joined
Jan 16, 2002
Messages
7
Location
GB
hi! i'm designing a dither circuit using maxplus 2...anyway i'm using 4 look up tables as a pipeline to get my spatial dither values. And i'm using a multiplexer swithed by a counter connected to the clock to select between them. The problem with the multiplexer is that it's very glitchy... so i cannot increase the clock frequency which was the whole purpose of the pipeline. What can i use in place of the multiplexer or what can i add to reduce the glitch?
 
Could you define glitchy? Are the signals going into the mux corrupted with spikes? Is it the output?
 
sorry... the input to the mux is from a set of dflipflops so its clean... the output is glitchy. If I sample the mux output with another flip flop, it will only be the correct value if I sample it quite slowly. The mux is selecting between 4 4bit bus lines... i hope that's enough info...and thanks for replying
 
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