You might also look for "voltage to frequency converters".
will get you to National's application note of the LM331 current to frequency converter with several different designs. I don't think they work up to 10MHz, but there's some good background information there.
Also check out Maxim's MAX083 (I think that's the number). A next generation of the old Intersil 8038 VCO chip. The Maxim part works to well over 10 MHz with good linearity.
for Analog Devices' voltage to frequency converter. Again, maybe not the frequency range of interest, but they usually have plenty of background information that may help you.
for a design by Jim Williams that operates from 1 hertz to 100 MHz. Again, plenty of design info. (And any design with a 160dB range is just cool.)
I doubt a design based solely on gates and schmitt triggers will be terribly linear or stable with temperature. Is that a concern?
For the theory, VisiGoth provided the basic theory.
To make a voltage controlled oscillator based solely on gates and/or Schmitt triggers, a la your discoverycircuit example, make a ring oscillator or RC relaxation oscillator. The frequency is (primarily) dependent on gate delay for the ring oscillator, and R, C, and amount of hysteresis of the Schmitt trigger.
That makes an oscillator. To make it voltage controlled, note that the propogation delay of a gate, or the amount of hysteresis of a Schmitt trigger is dependent on the supply voltage.
As an example, the typical propoagtion delay of a 74HC02 goes from 25nS with a 2V supply, 9nS with a 4.5V supply, and 7 nS with a 6V supply. Put an odd number of them into a ring and you can calculate the total propoagtion around the ring which gives you the frequency. Since the prop delay varies with frequency, so does the frequency. Low frequecy with large prop delay, high frequecny with low prop delay. Also note that these are *typical* delays. the maximium over part to part variation and temperature can range up to 115nS at 2V and -40 to 85 degrees C.
To have some better control, insert a well controlled fixed delay in the ring, then by varying the (hopefully) relatively small gate delay you might improve on the linearity. For the range you're talking about, you want about 91nS to 111nS.
This, with some specs on prop dalay should tell you what logic families may be suited for your task.