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The perfect buck or booost converter?

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schnell

Electrical
Apr 26, 2010
105
Hello,

I am doing SMPS's for a single product which sometimes runs off a battery, and sometimes off the secondary rail of an offline converter.

So:

I am doing a Boost converter as follows:-

V(in) = 2.1V
V(out) = 27V
P(out) = 2W
Switching frequency = 100KHz
(I have a 5V power rail available to act as a bias supply)


Also, I will be doing a Buck converter as follows:-

V(in) = 30V
V(out) = 2.4V
P(out) = 0.4W
Switching frequency = 100KHz


Given the above specification, is the following circuit the perfect way to do both of these circuits (as a synchronous buck or boost converter)..................

Schematic of synchronous buck or boost converter

.......taken from page 8 of .............

It looks cheap, simple and highly efficient.

It seems just too perfect to be true

Is it really as good as it seems?
Can you see any bugs?
 
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Having now followed the other link, I believe that you're off track by a country mile.

 
I was thinking along these lines for the Synchronous Buck or Boost converter, using the seriously cheap and efficient looking driver circuitry....

Synchronous Boost Converter:

Synchronous Buck Converter:


we don't like the specific actual "buck-boost" circuit since the output voltage is inverted, and this affects us in many ways.
 
Seems to me that your high-side circuitry in the boost circuit is superfluous. The high-side NPN is wired for operating with its drain at a higher voltage than its source, but your circuit, when boosting, puts its source higher than its drain, making it operate solely as a diode, so why not just use a diode?

Additionally, even if you could make it work in the correct direction, you'd never get closer than Vth to Vboost, and again, a diode would be better.

TTFN

FAQ731-376
 
For me the synchronous boost converter circuit seems fine............

Synchronous Boost:

-Surely the high-side NFET is properly turned on by the NPN of the "Qa" complimentary pair.

(though it does look like the high-side NFET would need a parallel Schottky so as to keep its intrinsic diode from starting to conduct when the high-side FET is turned OFF)
 
The M1 high-side NMOS substrate is tied to its source. When the inductor high side is released by turning off M2, it will conduct through the substrate connection of M1 to the capacitor. NMOS substrate is p-type, source and drain connections are n-type.

TTFN

FAQ731-376
 
-from what i see here, when M2 turns OFF, the inductor curent will flow through the intrinsic diode of M1, then after some dead-time, M1 will turn on and short out the intrinsic diode.

..i believe this is what you are saying?, though you are using more exact terminology

(-i will add a Schottky in parallel with M1 drain-source so that its intrinsic diode does not conduct)

We thought of the SEPIC , but really it would be more inefficient here, than a synchronous boost or buck
 
VE1BLL:
"Having now followed the other link, I believe that you're off track by a country mile."

-Judging by the number of blown FETs we're getting, i guess you are right.

My guess is that you looked at the fact that this circuit was designed to drive a motor winding at a few KHz, and that such a circuit would be very unlikely to be able to drive SMPS FETs at 100KHz?

The thing is , the complimentary BJT drivers, "Qa" and "Qb" above are PMD3001D from NXP............

PMD3001D DATASHEET:

.....Now page 8 and page 10 of the PMD3001D datasheet reveal hfe values of around 200 for Ic of around a few 100 mA's..........

PMD3001D hfe values at high Ic current:

....this high hfe value should be well enough to ensure we get decent FET gate drive current for the FETs "M1" and "M2" above.

-though i would confess that the PMD3001D datasheet does not provide a "fT" value for the BJT's.....and this is a nuisance because it must be around 150MHz for a 100KHz MOSFET driver....and the PMD3001D datasheet gives no indication of "fT" value.

(source for this is page 4 of AN18 from Zetex...........
)


So, my question is, how can you tell, from the PMD3001D datasheet that these BJT complimentary pairs cannot drive FETs at 100KHz?
 
Which FET(s) are you blowing? Both?

TTFN

FAQ731-376
 
when using it as a boost converter, its the bottom FET that's blowing.
 
Schnell: "My guess is that..."

You're reading way too much into my two brief responses to your original post. Your original post pointed to links that were not as stated. That was as far as I went. And in the 12 minutes between my first and second responses, I certainly didn't string together the missing information you've subsequently provided.

Good luck with your design.
 
Then you are either exceeding the max Vds rating, or power rating, or both.

TTFN

FAQ731-376
 
Oh, or the gate to source voltage rating. How are you regulating the output voltage, given that the max Vgs for the NMOS FETs is limited to 20V, but the nominal gate drive can exceed 25V for the bottom NMOS FET?

TTFN

FAQ731-376
 
my apologies, we are not using those FETs, we are using FETs with +/-30V maximum on Vgs
 
My real question concerns the ability of the PMD3001D complimentary pairs to be able to switch FETs in a 100KHz SMPS.

Synchronous Boost:

i.e., also, i am interested in knowing how the PMD3001D datasheet can be used to assess its ability as a MOSFET driver in a 100KHz SMPS.

PMD3001D DATASHEET:

.....For me there is no way of assessing, from the PMD3001D datasheet, whether or not this part has MOSFET driver potentail at 100KHz switching frequency.
-in particular, because the "transition frequency" (fT) is missing from the datasheet

am i correct?
 
fT would be handy at this point.

Can the PMD3001D provide enough current to discharge the gate (i.e. turn off the FET)?

gate charge = I * t

I had a simulation that showed I could turn a FET off in 15 nS. Luckily I dug into it and saw that I could as long as I pulled 9.8A out of the gate! My real circuit is a bit slower than that (147 mA @ 1 uS).

John D
 
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