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SSTL2 regulator

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Hi!

I have to design DDR SDRAM with SSTL2 bus. I need to give 1.25V to Vtt and Vref. It not as simple as it looks like.

I cannot find a reference design to complete the power of the DDR.
So if somebody know a solution or a link about my problem?

Thanks!
Guy
Hardware designer
 
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