hello
i already posted this to the usenet forum but it looks like nobody replies there, so i am trying here. i am sorry for the cross post.
i cannot get how the 'Allow unequal port widths' option works for the simulink merge block
the issue i have is that two 'enabled' blocks (they are mutually exclusive enable condition as explained in the merge block help) generates [96x1] and a [192x1] frame based signal @same rate so the merge block complains because the input sizes are different. i then check 'Allow unequal
port widths' box but still it does work: how should i set the 'initial input' and input port offset to make it work?
it looks like simulink computes statically the size of the vectors and complains before start executing ...
as another possibility, should i disable some high level option to disable this size errors (which really does not matter since the blocks are mutually exclusive)?
thanks to whoever will reply
i already posted this to the usenet forum but it looks like nobody replies there, so i am trying here. i am sorry for the cross post.
i cannot get how the 'Allow unequal port widths' option works for the simulink merge block
the issue i have is that two 'enabled' blocks (they are mutually exclusive enable condition as explained in the merge block help) generates [96x1] and a [192x1] frame based signal @same rate so the merge block complains because the input sizes are different. i then check 'Allow unequal
port widths' box but still it does work: how should i set the 'initial input' and input port offset to make it work?
it looks like simulink computes statically the size of the vectors and complains before start executing ...
as another possibility, should i disable some high level option to disable this size errors (which really does not matter since the blocks are mutually exclusive)?
thanks to whoever will reply