Hiya-
The VME bus is a pretty straightforward memory mapped device. If you can find an IP PCI core, you have most of the battle done. By limiting the number of different transactions to gear them towards I/O operations, you can carve a lot of the FPGA requirements down.
No, I don't have any designs I can pass along. This was all done as "work for hire" and I don't have the rights to them.
Sorry.
Cheers,
Rich S.