Contact US

Log In

Come Join Us!

Are you an
Engineering professional?
Join Eng-Tips Forums!
  • Talk With Other Members
  • Be Notified Of Responses
    To Your Posts
  • Keyword Search
  • One-Click Access To Your
    Favorite Forums
  • Automated Signatures
    On Your Posts
  • Best Of All, It's Free!

*Eng-Tips's functionality depends on members receiving e-mail. By joining you are opting in to receive e-mail.

Posting Guidelines

Promoting, selling, recruiting, coursework and thesis posting is forbidden.

Students Click Here

White Paper: Physical Design Data Validation from Cell Design to Tapeout

In a typical integrated circuit (IC) design firm, semi-custom design flows are used to ensure that the final manufactured products meet all of their design requirements and can be delivered on schedule. Given that IC design teams are often working collaboratively across the globe, companies have chosen to implement parallel design workflows to keep disparate teams on the same page. However, these parallel systems can prove to be a problem. If one team makes a mistake in their design, it often affects the work of another team, creating knock-on problems that can delay a release.

This nine-page white paper discusses how managing design integrity from cell and block design through tapeout in parallel design implementation flows is crucial to synchronize design elements between teams and avoid costly delays. Managing the integrity of data during design iteration or FEOL/BEOL staged tapeout flows can prevent delays during implementation and ensure the data being sent to be manufactured is what was intended.

This paper will help you to:
  • Identify common pitfalls resulting from incomplete physical design validation during SoC implementation
  • Prevent out-of-sync abstracts in Place & Route flows by comparing LEF macro objects
  • Validate latest versions of IP that are referenced in block and chip level design databases
  • Minimize runtime required for validating FEOL/BEOL changes for staged tapeout flows

This eBook is sponsored by Mentor Graphics. To download, please complete the form on this page.

Get Your Resource

Please provide the following to access your download.

Close Box

Join Eng-Tips® Today!

Join your peers on the Internet's largest technical engineering professional community.
It's easy to join and it's free.

Here's Why Members Love Eng-Tips Forums:

Register now while it's still free!

Already a member? Close this window and log in.

Join Us             Close