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White Paper: Improve Reliability with Accurate Voltage-Aware DRC

Current integrated circuit (IC) designs are complex, which can result in different voltages being located close to one another. To prevent time dependent dielectric breakdown (TTDB), it is essential to incorporate space rules within IC design.

Download this six-page white paper to learn how to:
  • Understand optimal design size and voltage spacing rules
  • Prevent TTDB in your IC designs
  • Do away with manual marker layers, while improving design reliability

About the Author:
Matthew Hogan is a product marketing manager at Mentor Graphics, with more than 20 years of experience in the industry.

He has also served as a Member of the Board of Directors at the EOS/ESD Association, and as a senior application engineer at Mentor Technologies.


Complete the form on this page to download your free white paper. Your download is sponsored by Mentor Graphics.

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