×
INTELLIGENT WORK FORUMS
FOR ENGINEERING PROFESSIONALS

Contact US

Log In

Come Join Us!

Are you an
Engineering professional?
Join Eng-Tips Forums!
  • Talk With Other Members
  • Be Notified Of Responses
    To Your Posts
  • Keyword Search
  • One-Click Access To Your
    Favorite Forums
  • Automated Signatures
    On Your Posts
  • Best Of All, It's Free!

*Eng-Tips's functionality depends on members receiving e-mail. By joining you are opting in to receive e-mail.

Posting Guidelines

Promoting, selling, recruiting, coursework and thesis posting is forbidden.

Students Click Here

White Paper - Accelerate Early Design Exploration & Verification for Faster Time to Market

Early chip-level physical verification faces many challenges. The Calibre Recon tool enables design teams to perform analysis and physical verification of full-chip design layouts during very early stages of the design cycle, while the different components are still immature. With Calibre Recon, designers can quickly and easily find and resolve integration issues using the foundry/IDM Calibre sign-off design kit, while reducing total DRC runtime, accelerating design closure, and ensuring high-quality designs.

Your download is sponsored by Siemens Digital Industries Software.

Get Your Resource

Please provide the following to access your download.

Close Box

Join Eng-Tips® Today!

Join your peers on the Internet's largest technical engineering professional community.
It's easy to join and it's free.

Here's Why Members Love Eng-Tips Forums:

Register now while it's still free!

Already a member? Close this window and log in.

Join Us             Close