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Recent content by EEMS

  1. EEMS

    Anyone with ATA memory I/F design experience?

    IRstuff -- FPGA fam is completely irrelevent, however its will be >2Meg part. Also theoretical values in FPGA datasheets is very different than practicality. ...never heard of anyone acheiving a 1Ghz sophisticated FPGA design, not even 1/2 that. Serial will require >160Mhz clock, which yes...
  2. EEMS

    Anyone with ATA memory I/F design experience?

    Thanks VE1BLL for your thoughts on obsolescence which is always a concern. What are you suggesting is the up and coming standard? S-ATA has been around since 2003 right? Noramlly part obsolescence is tied to the market, so what would be replacing this particular application where serial data...
  3. EEMS

    Anyone with ATA memory I/F design experience?

    Well S-ATA is not an option with an FPGA since we require >20MB/s transfer rate, which is not going to happen with SATA given our limitations on PCB size, FPGA density, etc. I should have elaborated a little more, so let me do so now. ...some info is repeated, but more clarification is added. I...
  4. EEMS

    Anyone with ATA memory I/F design experience?

    I am trying to find someone who has some experience designing interfaces with a component built off the PATA standard. Preferably in a non disk drive/cabling interface, but more of a FPGA based interface control for the memory on same PCB -- granted any ATA interface experience could help answer...
  5. EEMS

    Whats the best non-volitile, SolidState memory to optimize speed/densi

    I work in the IRAD department and am currently looking at the newest technology trends pertaining to non-volitile memory since we are looking to designing a small form factor PCB that can record TDMA data at 20Mbytes/sec, >8Gbytes, and has smallest package. Thus far, PATA NANDrive memorys seem...
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