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Recent content by Allen44
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TSMC 65nm sealring LVS error
Hi I am using TSMC 65nm PDK for tape out. The LVS was clean before I add the sealring. However, when I added the sealring, the LVS complaint about 2 things: (A) Stamping conflict. Net VSS is selected for stamping. (B) the additional nets and instance. The additional device from the sealring...- Allen44
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- Replies: 3
- Forum: Circuit design
