Voltage Spikes in Integrator CKT
Voltage Spikes in Integrator CKT
(OP)
Hello all,
I am having a small problem with a square-wave driven integrator circuit. The details are as follows:
Input voltage: +/- 2.5 V square wave at 24kHz 50% DC
Feedback Cap: 4700pF
Input Resistor: 2.55k
Configuration: Inverting
Power Rails: +/- 2.5 V
Desired output: 24kHz triangle wave
The integrator produces a nice triangle wave for the most part, but there exists a voltage spike at the peaks of the output (when the input changes polarity) on the order or 700mV in amplitude. I have experimented with different op amps and not surprisingly found that the amplitude and duration of the spike are directly related to slew rate (faster SR producing higher amplitude spike for shorter time duration and vice versa). I was wondering if anyone could give me a better idea as to why this spike is occurring. What non-idealities of the op amp create this spike? How can I choose an op amp to limit this spike?
My main concern regarding the spike is that it may harm components down stream if used as the input. I believe the op amp chosen is capable of rail-to-rail inputs and outputs, yet the spike may exceed the rail voltage. Besides using a LPF, how can I limit/rid the spike?
Any ideas?
Thanks,
Kevin
I am having a small problem with a square-wave driven integrator circuit. The details are as follows:
Input voltage: +/- 2.5 V square wave at 24kHz 50% DC
Feedback Cap: 4700pF
Input Resistor: 2.55k
Configuration: Inverting
Power Rails: +/- 2.5 V
Desired output: 24kHz triangle wave
The integrator produces a nice triangle wave for the most part, but there exists a voltage spike at the peaks of the output (when the input changes polarity) on the order or 700mV in amplitude. I have experimented with different op amps and not surprisingly found that the amplitude and duration of the spike are directly related to slew rate (faster SR producing higher amplitude spike for shorter time duration and vice versa). I was wondering if anyone could give me a better idea as to why this spike is occurring. What non-idealities of the op amp create this spike? How can I choose an op amp to limit this spike?
My main concern regarding the spike is that it may harm components down stream if used as the input. I believe the op amp chosen is capable of rail-to-rail inputs and outputs, yet the spike may exceed the rail voltage. Besides using a LPF, how can I limit/rid the spike?
Any ideas?
Thanks,
Kevin





RE: Voltage Spikes in Integrator CKT
RE: Voltage Spikes in Integrator CKT
Is the spike the same polarity as the triangle ( pos. on
the positive peak ) measured on the op.amp output ?
<nbucska@pcperipherals.com>
RE: Voltage Spikes in Integrator CKT
RE: Voltage Spikes in Integrator CKT
<nbucska@pcperipherals.com>
RE: Voltage Spikes in Integrator CKT
Remember, the feedback on an op-amp integrator is via a capacitor - effectively a very high impedance at low frequencies and infinite impedance at DC.
RE: Voltage Spikes in Integrator CKT
RE: Voltage Spikes in Integrator CKT
acceptable -- but it has nothing to do with the spike.
Kevin : Waiting for the polarity of spike .
<nbucska@pcperipherals.com>
RE: Voltage Spikes in Integrator CKT
RE: Voltage Spikes in Integrator CKT
The output /\/\
The rising edge causes a positive spike i.e. the SQW input
has capacitive xtalk to the non-inv, input. Add GOOD decoupling, rearrange the circuit to reduce the distance or move parts to the other side of the board, add shield etc.
If the op.amp is fast enough, you may try to add a SMALL
cap parallel to the 2.55K input R in series with the small
R.
<nbucska@pcperipherals.com>
RE: Voltage Spikes in Integrator CKT
First let’s look at BrianG’s comment about adding a resistor across the capacitor. This is not a "nice to have", it is an essential. The integrator has infinite gain to the DC component of the waveform, and to its own offset, if no resistor is used. There is no evidence of your using a reset circuit anywhere, so the opamp will hit the power rails, one way or the other, unless you define its DC position somehow. This, however, is nothing to do with the spike, as nbucska correctly observes.
Next let’s look at the spikes. People are talking about common-mode rejection problems and cross-talk. In order to get 700mV spikes on the output you would have to have 700mV spikes on the non-inverting input. That is not cross-talk or power supply rejection, that is a complete disaster! You have a definite gross fault in your circuit. You say that you have ±2.5V rails, suggesting that the positive (non-inverting) input of the opamp is sitting at ground (0V). I don’t believe you
Measure things in the area with a scope probe, particularly the so-called grounds. We are not talking about the sub-mV levels people normally worry about for cross-talk issues, we are talking about 700mV! I suspect that the ground is being generated by a virtual ground generator, or some such thing, and what you thought was ground really isn’t. Either that or you are using a <10ns square wave edge and didn’t mention it.
RE: Voltage Spikes in Integrator CKT
The OP.amp may be too fast, too, or the 4700pF may have LONG
wire in series ??
Try to slow down the _-_-
<nbucska@pcperipherals.com>
RE: Voltage Spikes in Integrator CKT
1.) The circuit is being generated on PSPICE, and is not built at the moment. All problems are being reported from P-SPICE, and not live data.
2.) Don't worry about the DC drift it is taken care of and like many of you said, does not pertain to this problem.
3.) The non-inverting terminal is grounded with a series resistance of 2.55k ohms.
4.) If spikeless, the output of the waveform is approximately +/- 2V; therefore, the spikes cause the input to exceed rail voltage.
5.) During the simulation, you do see a small spike at the inverted input to the op amp when the square wave changes polarities, this small voltage spike is not seen on the grounded non-inverting terminal.
I hope this clears things up. I didn't mention the P-SPICE deal before as I am trying to put off blame of the software as a last resort.
RE: Voltage Spikes in Integrator CKT
use ideal _-_-
<nbucska@pcperipherals.com>
RE: Voltage Spikes in Integrator CKT
The input rise time and fall times are on the order of 40 and 70 ns.
RE: Voltage Spikes in Integrator CKT
RE: Voltage Spikes in Integrator CKT
Note that cross-talk, ground noise, ground loops etc are not modelled by SPICE based simulators unless you explicitly include components to produce these effects.