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ESD immunity help!

ESD immunity help!

ESD immunity help!

(OP)

   I have a product that needs signifigant help in increasing the ESD and transient immunity in the circuit layout. Where is a good concise plan or outline on optimizing the layout to achieve this. I am going from 2 layers to 4 layers as a start. Thanks for any help.

RE: ESD immunity help!

Why?  Do you have data that shows that internal circuits are getting zapped?  

Why not just overcoat it?  

Why are your users (?) handling the boards without ESD protection?

TTFN

RE: ESD immunity help!

Are you sure you mean ESD and not EMI?  Maybe you do, but it's best to check that out now rather than 10 posts of potentially meaningless questions...

RE: ESD immunity help!

ESD travels on surfaces and prefers edges. It really does not matter is  have to be a conductor. Almost any continuous surface will block it. One way to use a four layer board is to put the planes on the outer layers and the traces internal. This clearly does not work for surface mounted devices. Transients generally involve ground. If possible, put series resistance on inputs and outputs but keep in mind that the resulting RC delay can slow down high speed circuits. OP amp circuits should have the same input resistance on both inputs. This improves offset voltage due to input currents as well as reduces sensitivity to EMI. Input resistors will improve the built in ESD protection of ICs. If caps are blowing, change to self healing caps. There are many more tricks but without knowning more about the product and application, we can't do much more.

RE: ESD immunity help!

(OP)

   In answer to the above question concerning ESD/EMI, the system gets its display trashed when you touch the adjustment knob at times. It takes about 3KV air discharge to do this, according to my discharge gun. I also want to lower the EMI sensitivity as well. A spark discharge of around 5-6KV really gives it fits depending on where on the metal case it occurs. The system disturbances generally involve the display, but increase discharge levels sometimes changes the operating mode as well >7.5KV.

RE: ESD immunity help!

I think a 4 layer is too expensive and wouldn't help much.
Can you FAX me a block diagram and E-mail me the description
of the package and your fax# ?

<nbucska@pcperipherals.com>

RE: ESD immunity help!

Are you absolutely sure the display trashng is due to ESD?  If there is an electrical connection between the knob and the system, touching it increases capacitance significantly and makes for a sizeable antenna at certain frequencies.  Is it possible external interference is coming in through this "living antenna" and trashing something down the line?

I guess I should also ask, when you say "trash the display", does this mean the display is screwed and needs to be replaced, or is this more of a temporary thing like odd characters showing up until reset?

RE: ESD immunity help!

That sounds like a bad grounding and poor noise immunity design and not ESD sensitivity, per se.  

The fact that it occurs on a knob as well as on the chassis suggests bad bonding of the chassis to ground, since most knobs are either plastic, which does not conduct electricity, or metal, which is usually in contact with the chassis.

Re-layout of the board will not help if the grounding is not improved or if the noise margin is not increased.

TTFN

RE: ESD immunity help!

This is quite a common problem on front panels as far as I am concerned. I always sort mine out so they can handle ±15kV discharges without a problem. At 15kV it is very pyro-technic and FUN!

The stuff I work on has a metal case. The ESD wants to be on the outside of the metal case. By that I mean that wherever you inject the stuff it will take the shortest path to get to the outside of the case.

Shafts of pots, rotary encoders, switches and the like often have ground connections. So you tie them to the ground of your system and the system gets wrecked by the ESD. CMOS chips get blown or change state. Any registered (latched) data gets corrupted. Yep, been there and done it.

By all means use a 4 layer pcb. However, the outer layer, the layer closest to the outside of the instrument must be the ESD "escape plane" to which the switches and shafts are connected. Nothing else must be connected to this plane. Route the ESD plane to the outside of the case by pillars or other links.

The wavefront of ESD has a sub-pico-second risetime. The instantaneous voltage difference between parts of the plane is never less than hundreds of volts and rings like crazy. Any logic device connected to the ESD plane would either get trashed or change state.

You have to be able to visualise where the current is going to flow when it is injected. If you were an electron, which way would you go in your pursuit of the freedom of the outside world? Remember Faraday’s ice pail? Charge resides on the outside of a conductor. Well ESD does too, but it has to get there first!

Once you get the hang of this it is not difficult. Plan the design from the beginning so that any injection point has an easy path to the outside of the case.

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