0.1 micron lithography
0.1 micron lithography
(OP)
Can anyone provide me with a little detail on applications of 0.1 micron lithography?
-Jim Intrater
-Jim Intrater
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RE: 0.1 micron lithography
TTFN
RE: 0.1 micron lithography
RE: 0.1 micron lithography
The photoresist is developed, leaving unexposed photoresist covering portions of the wafer not participating in the following processing steps. These steps include etching of materials, or deposition of materials. The photoresist is then removed.
Following that are other processing steps and eventually another photoresist exposure, development, etc. Typical CMOS processes in modern devices consist of upwards of 14-20 photoresist steps, each one adding a step in the process, culminating in the finished IC.
0.1 micron refers to the smallest defined feature of the device, typically the gate length. The CMOS transistors are surface field effect devices, characterized by a gate width and length. Shorter gate widths result in faster devices, hence the push to 0.1 micron. Other features such as metal and diffusion line widths likewise are driven to smaller dimensions to allow tighter packing of devices. That's why microprocessors, which started with a few thousand transistors can now be built with millions of transistors, while still fitting in die sizes that can be packaged in relatively small packages.
TTFN
RE: 0.1 micron lithography
RE: 0.1 micron lithography
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Mike Kirschner
Design Chain Associates, LLC
http://www.designchainassociates.com
RE: 0.1 micron lithography