Interfacing 3.3V device to a 1.8V parallel bus
Interfacing 3.3V device to a 1.8V parallel bus
(OP)
Hi,
On my existing design, the Processor's External Bus Interface (EBI) is currently interfacing to a SDR SDRAM chip. The bus runs on 1.8V @ 130 MHz. Now, I need to add a device to the EBI, but unfortunately, this device requires 3.3V to run. Besides the obvious level translation IC, do I need any buffering IC or terminating resistors?
Thanks!
James
On my existing design, the Processor's External Bus Interface (EBI) is currently interfacing to a SDR SDRAM chip. The bus runs on 1.8V @ 130 MHz. Now, I need to add a device to the EBI, but unfortunately, this device requires 3.3V to run. Besides the obvious level translation IC, do I need any buffering IC or terminating resistors?
Thanks!
James





RE: Interfacing 3.3V device to a 1.8V parallel bus
RE: Interfacing 3.3V device to a 1.8V parallel bus
There are some major system-level issues here. You may want to allow the SDRAM clock to bypass the switch, and put the SDRAM in self-refresh when you are not using it. Otherwise you will lose your SDRAM contents. You will need weak pullups (or something) on the SDRAM side of the fet switch, because otherwise the signals will be floating.
Also, does the processor use SDRAM for the stack? What will happen when SDRAM is not available? Is the hardware smart enough to understand all that?
This is a big problem and would probably require a lot of back-and-forth to resolve completely. Maybe that is why you received no replies.
--mkeith