Anyone with ATA memory I/F design experience?
Anyone with ATA memory I/F design experience?
(OP)
I am trying to find someone who has some experience designing interfaces with a component built off the PATA standard. Preferably in a non disk drive/cabling interface, but more of a FPGA based interface control for the memory on same PCB -- granted any ATA interface experience could help answer some of my questions regarding if this is the optimal path, developement issues, limitations, etc?
I want to use an FPGA to control this memory device which is an 8Gb NANDrive, PATA memory with built in MCU to translate host signals/commands/ and media wear leveling, etc.
The device I am looking at is http://www.greenliant.com/products/?inode=46308
I have read that SATA memory devices (serial vs parallel) will be taking over, but I assume (and hoping for confirmation on my assumption) this information was strictly referring to the PC based disk drive/cabling interface application since the serial uses less I/Os, but for other applications (recording streamed telemetry data), I would think there will always be a strong market for these PATA devices.
Any info is greatly appreciated!
I want to use an FPGA to control this memory device which is an 8Gb NANDrive, PATA memory with built in MCU to translate host signals/commands/ and media wear leveling, etc.
The device I am looking at is http://www.greenliant.com/products/?inode=46308
I have read that SATA memory devices (serial vs parallel) will be taking over, but I assume (and hoping for confirmation on my assumption) this information was strictly referring to the PC based disk drive/cabling interface application since the serial uses less I/Os, but for other applications (recording streamed telemetry data), I would think there will always be a strong market for these PATA devices.
Any info is greatly appreciated!





RE: Anyone with ATA memory I/F design experience?
So, if I can't get the largest capacity drives in PATA, why would I use that interface? eBay doesn't even recognize "TB PATA" as a search phrase, and changes it to "TB SATA"
TTFN
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RE: Anyone with ATA memory I/F design experience?
If just need the hardware solution and you'd rather not design and build it yourself, I know of a custom design house in the area of Washington, DC that has experience in this area.
RE: Anyone with ATA memory I/F design experience?
Anyway, I am currently looking at the newest technology trends pertaining to non-volitile memory since we are looking to designing a small form factor FPGA based PCB that can record TDM data at >20Mbytes/sec, >8Gbytes, and has smallest package.
Thus far, PATA NANDrive memories seem to be the best when attempting to optimize performance, density and real estate for this particular application. Cannot use SATA as the clock frequencies will be too high. I am new to the ATA standard as this is normally interfaced to a Host via a cable using Ultra DMA data transfers. I am concerned there are better memories out there that I dont know about. Does anyone have any other recommendations or am I on point with this component? See link below.
All in all I am looking for confirmation that an FPGA is adequate for controlling this device I found below (since device has built in NAND controller) and that this is the best path to take.
The device I am looking at is
Greenliant > Solid State Storage > NANDrive > GLS85LP1008B
which has a built in NAND controller, so it seems using an FPGA to interface with this would not be an issue or too costly. Would you agree with this??
I want to use an FPGA to control this memory device which is an 8Gb NANDrive, PATA memory with built in MCU to translate host signals/commands/ and media wear leveling, etc.
To me it appears the internal NAND Controller opens the market up for this product to be used in any application requiring fast memory aquisition of a high density memory device with minimal real estate usage? Please correct any misunderstandings on my part.
I have read that SATA memory devices (serial vs parallel) will be taking over, but I assume (and hoping for confirmation on my assumption) this information was strictly referring to the PC based disk drive/cabling interface application since the serial uses less I/Os, but for other applications (recording streamed telemetry data), I would think there will always be a strong market for these PATA devices.
Sorry to be repetative, but again I am hoping to get confirmation that an FPGA is adequate for controlling this device (since device has built in NAND controller) and that this is the best path to take.
Any info is greatly appreciated!
RE: Anyone with ATA memory I/F design experience?
I can't comment further on the FPGA details as your 20MBps data rate is bytes/bits faster than anything I've seen in person.
RE: Anyone with ATA memory I/F design experience?
RE: Anyone with ATA memory I/F design experience?
Nonetheless, there are FPGAs that can trivially handle the data rate, which, by modern standards is pretty slow. All of the major FPGA families can run in excess of 1 Gbps per pin. 20 Mbps/pin is rather slow for most FPGAs.
TTFN
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RE: Anyone with ATA memory I/F design experience?
Obviously, one would try to use an off-the-shelf chip that interfaces directly to the SSD. The only truly creative design work should be where your unique data format needs to brought into the system. The rest should be pretty standard computer architecture.
There seems to be a very short capture period (8GB/20MBps = 7 minutes). This implies that your power budget isn't going to be overly strict. (?)
RE: Anyone with ATA memory I/F design experience?
RE: Anyone with ATA memory I/F design experience?
We were, I thought, talking about I/O rates, and the point was that an I/O pin designed for >1Gbps operation should have no problems doing 20Mbps.
TTFN

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