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Bench top semiconductor prototyping
2

Bench top semiconductor prototyping

Bench top semiconductor prototyping

(OP)
Is it possible to make a bench-top machine that puts out semiconductors in unit quantities? Ideally, it would take a silicon 'blank' and some source of metals and dopants, and fabricate a finished device via ion implant and soft-landing ion deposition.

Do you think it's possible? Has such a thing ever been proposed or prototyped? What would the major stumbling blocks be?

Thanks.

RE: Bench top semiconductor prototyping

What "semiconductors" are we talking about, exactly?  Diodes? Transistors?

We used to have a lab at school in an EE class where the semester project was making a transistor.  Anyone who succeeded in making a BJT got an A.

In general, what you're asking for is not practical outside of a class 100 lab.  The chemicals are all toxic, and ion implanter is rather gigantic, an annealing furnace could be desktop, but would still run truckloads of money, and lithography is still a problem.

TTFN

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RE: Bench top semiconductor prototyping

(OP)
What semiconductors = anything from power transistors to processors. No lithography. The idea is to make one little device at a time using only deposition and ion implant. The machine would print the circuits directly onto a die using an ion beam. A single device per day is enough.

So the toxic materials are only the dopants, and those would be in tiny quantities. I wonder if it can be done using only Al, Si and P?

It doesn't have a practical industrial use. It could be used in space. If it was cheap enough, it could be used for research. I imagine something like an electron microscope, shooting dopants, oxygen or glass, and aluminum instead of electrons.
 

RE: Bench top semiconductor prototyping

Sounds good from a theoretical standpoint... but from a practical standpoint, it's not a worthwhile adventure.  No lithography in the process?  There are challenges to solve there.

Dan - Owner
http://www.Hi-TecDesigns.com

RE: Bench top semiconductor prototyping

(OP)
So the answers are (as I see it):

Do you think it's possible? = Yes
Has such a thing ever been proposed or prototyped? = probably not
What would the major stumbling blocks be? = beam focus, ion energy control

I expected a bit of pessimism. I'm encouraged by your responses.

RE: Bench top semiconductor prototyping

At Signetics we did the same thing, except only the Back End processes(from finished wafer onward).  for instance we had a molding machine that molded only one single lead-frame strip at a time. It wasn't even hydraulic!


For pessimism I'll ask: "what's the point?"  A huge part of semiconductor fabrication is tweaking the process into working correctly.   Doing "single IC writings" with e-beams, etc., will take umpteen attempts, perhaps each taking a day to finally get a single IC.  Then! Almost none of that will transfer to a mass production process.

Keith Cress
kcress - http://www.flaminsystems.com

RE: Bench top semiconductor prototyping

'twould be a bit like making your own nails on a coal forge, to build your tree house.  Could be done, but with nails $1.00/pound at the local hardware store, who could be bothered?

RE: Bench top semiconductor prototyping

(OP)
Umpteen attempts? Why not one attempt?

It could be used in space. If it was cheap enough, it could be used for research.

RE: Bench top semiconductor prototyping

For a 'bench-top', I'm guessing the resolution will be limited by structural vibrations of whatever building or spacecraft that it happens to be in, so maybe you could use it to build, say, a slow 6502, small enough for a 40DIP package, overnight.  

I think you can get a 6502 or fancier uP supplied as IP in field-programmable logic already, in a smaller package with a faster clock and a lower power requirement.

The only virtue of geometry as large as what I implied/guessed is that it can be probed manually and observed in action with a relatively low powered microscope, so maybe it has some educational value.  ... if you can get the generating machine's price down far enough for education budgets.

So, yeah, it's possible.  Maybe using that crowdsourced model where everybody prepays for a kit of parts to fund development of the kit, but we're talking an order of magnitude or six more development money than coming up with a small CNC router in a plywood frame...
 

Mike Halloran
Pembroke Pines, FL, USA

RE: Bench top semiconductor prototyping

(OP)
I can imagine a way to get rid of vibration in zero-G, or in a colony.

It doesn't matter, I'm done here. I would happily hear from anyone with design experience in mass specs, electron microscopes and the like. I'll keep an eye out, thanks!

RE: Bench top semiconductor prototyping

(OP)
Besides, I like the 6502! Those were the days!

RE: Bench top semiconductor prototyping

Do you think it's possible? = Not really.

Has such a thing ever been proposed or prototyped? = actually yes, nearly 30 yrs ago.  However, practicality is close to nil.  You need insulators and metallization, which means you need also plasma/reactive ion etch, sputtering, passivation, annealing, etc.  The closest thing to this are the active matrix transistor technology for displays.  Hypothetically, one could do something like that with what amounts to an inkjet printer.  But to what end?  The transistors made with this type of process are barely good enough to crank a display, and nowhere near good enough to build anything with more restrictive requirements.  

Power transistors, of any ilk, require precision depositions and anneals, as well as extremely good metallization.  Processors require at least 2 layers of metallization, and more likely, 3 layers.  An processor of any tolerable performance would require millions of transistors; doing them one by one would be equivalent to watching grass grow.  Actually, grass would be faster. 5 million transistors at 10 seconds a pop = 1.58 yrs.

What would the major stumbling blocks be? where to begin?  At the minimum, an office desktop system is physically impossible, unless the desktop was at least 100 sq ft in area, and about 8 ft tall:

High vacuum is required for ion implant, as well as plasma etch, as well as metallization.  The pumps required to do high vacuum alone would occupy about half of a standard office desktop.  

You could potentially get away with using only a laser anneal, but the laser for something like this would occupy at least one desktop's area.  Rapid thermal anneal is more likely to be required, again, another desktop's worth of area.  Plasma and reactive ion, as well as sputtering require rather massive RF power supplies; another desktop chewed up.  A normal ion implanter is rather massive to begin with.  The extraction supply alone would take up have a desktop.  Direct write on wafer was proposed and demonstrated with e-beam lithography about 40 yrs ago.  That alone was another desktop's area gone.  I think I've already gone past my initial 100 sq. ft. area estimate.

The fact that you've apparently done zero research prior to posing this question is problematic.   

TTFN

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RE: Bench top semiconductor prototyping

The high (hard) vacuum is easy "in space".
 

RE: Bench top semiconductor prototyping

Quote (ReggiePerrin):

I can imagine a way to get rid of vibration in zero-G
I can't imagine an easy one... lots of motors, fans, etc. moving on a space station, and with no connection to a large mass (i.e., Earth), there's little damping.  Millions are spent just in figuring out oscillatory periods and damping methods to avoid having the ship shake itself apart, and it's not like you can just set this machine on top of a 2,000 pound granite slab in the middle of a sand table.

Dan - Owner
http://www.Hi-TecDesigns.com

RE: Bench top semiconductor prototyping

Such machines exist - sort of.  Focused Ion Beam (FIB) technology is used in a process called Circuit Edit.  Small amounts of gas are introduced in the beam path just above the sample.  The beam is rastered in a user-defined pattern and the ions (gallium, typically, though helium is out there, too) react with the gas.  Without any reactive gas, the ions mill the sample.  Bromine, chlorine and XeF2 are used to enhance the etch rate and make more the walls more vertical.  Gases containing tungsten or platinum are used to deposit conductors and a combination of gases is used to deposit SiO2, an insulator.  
This process is used during chip design and can reduce the time and cost of debug.  Chips are tested; problems found and fixes proposed.  Using circuit edit, many repairs on a chip can be tried and proven without having to cut a new mask.  
So, similar idea; different application.  I haven't heard of anyone using ion beams in the manner suggested.  I am not an ion diffusion expert but I know that typically, the energies there are several hundred kV to get adequate implant depth.  
I work with scanning electron microscopes and FIBs as described above.  30 to 50 kV is the max energy.  Much more than 50 kV and the design rules change drastically as stand-off distance; current or voltage needed to deflect and focus the beam; shielding for ionizing radiation, among other parameters, don't scale linearly.  So this might be a limitation.   
Maybe this is possible but the machine would be more living room sized than desk top.   

RE: Bench top semiconductor prototyping

I wouldn't exactly want some of those chemicals sitting next to my desktop in a "small as possible" container...

Dan - Owner
http://www.Hi-TecDesigns.com

RE: Bench top semiconductor prototyping

(OP)
Thanks again for the responses. The FIB is very close to what I want. I think it can all be done with deposition, which should not require 100kV. No etching. If some high potentials are needed, so be it.

I would rather avoid annealing it so the dopants would be pre-dilluted in Si. Anyway I was hoping to use just 4 elements: Si, P, Al, O. If I lived on Mars I wouldn't want to have to find Gallium or Indium.
 

RE: Bench top semiconductor prototyping

Anything that you can make with just a FIB will have pretty poor characteristics, possibly even poorer than the printed transistors on polySi.  Note that you can't even make CMOS with just a FIB, nor anything requiring a vertical diode or transistor.

 

TTFN
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