Member Login

Remember Me
Forgot Password?
Join Us!

Come Join Us!

Are you an
Engineering professional?
Join Eng-Tips Forums!
  • Talk With Other Members
  • Be Notified Of Responses
    To Your Posts
  • Keyword Search
  • One-Click Access To Your
    Favorite Forums
  • Automated Signatures
    On Your Posts
  • Best Of All, It's Free!

Join Eng-Tips
*Eng-Tips's functionality depends on members receiving e-mail. By joining you are opting in to receive e-mail.

Posting Guidelines

Promoting, selling, recruiting, coursework and thesis posting is forbidden.

Link To This Forum!

Partner Button
Add Stickiness To Your Site By Linking To This Professionally Managed Technical Forum.
Just copy and paste the
code below into your site.

Schematics for a TENS

Schematics for a TENS

I am currently working with schematics for a muscle stimulator. The muscle stimulator will be used in a rehabilitation technique. One of the basics for this rehabilitation technique is to use many independent output channels with three degrees of freedom, amplitude (voltage set), frequency and pulse duration. A muscle stimulator uses electrical pulses to stimulate muscles in a body, the transfer between the apparatus and the muscle is usually not invasive, but is done using surface mounted electrodes on the skin.

I currently have a solution which I would appreciate some thoughts and comments on. The schematic is shown below (one channel only).

V + is a constant voltage source to 40V +.

OK1 is an opto couplers with triac-output. This will disconnect from the anode when the channel is not in use.

T1 is a high-frequency transistor, whose function is to limit the flow of current to a desired level by using a PWM signal (4bit, 50MHz)

RL is the load, in this case a muscle.

IC1A, IC1B is comparators which send signals to logic to give indication of high or low current flow through the circuit. They should indicate below 1mA and above 40 mA.

RC1, RC2, RC3, RC4, are all resistors to give the comparators reference signals.

I have three questions; first, will T1 be able to limit the voltage? Since the pwm is 4bit it will provide 16 steps and this will lead to 16 linear steps in the amplitude, correct?

Second, how similar will the voltage-drop over T1 be? Is it possible to have the same RC1, 2, 3 for allt channels?

Thee, is there anything else I have completely missed?

Kind regard/ Johan, Sweden

RE: Schematics for a TENS

How would T1 limit the voltage?  It's a switch.

Even using PWM, it can't limit current, either... that's the resistor's job.

Dan - Owner

RE: Schematics for a TENS

And after reading all that, I still do not know what is a TENS.

RE: Schematics for a TENS

If you place an RC Low Pass filter (with a cutoff frequency less than your PWM frequency) in the net named LOGIC3 then the base current of T1 would be controlled by your average voltage due to the PWM waveform and the resistor of the LPF.  The collector current of T1 is then limited to base current times beta.  The beta of a transistor in not generally well controlled so you would would have to decide if the current limit is accurate enough for your application.

Red Flag This Post

Please let us know here why this post is inappropriate. Reasons such as off-topic, duplicates, flames, illegal, vulgar, or students posting their homework.

Red Flag Submitted

Thank you for helping keep Eng-Tips Forums free from inappropriate posts.
The Eng-Tips staff will check this out and take appropriate action.

Reply To This Thread

Posting in the Eng-Tips forums is a member-only feature.

Click Here to join Eng-Tips and talk with other members!


Close Box

Join Eng-Tips® Today!

Join your peers on the Internet's largest technical engineering professional community.
It's easy to join and it's free.

Here's Why Members Love Eng-Tips Forums:

Register now while it's still free!

Already a member? Close this window and log in.

Join Us             Close