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slope compensation in smps

slope compensation in smps

slope compensation in smps

(OP)
I am doing an offline flyback SMPS, and using UC3843 PWM controller

On page 8 (bottom) of the UC3843 datasheet...........

http://focus.ti.com/lit/ds/symlink/uc3843.pdf

..........it says we should use the clock ramp to provide a ramp for slope compensation.

However, on page 5 of  "Six common reasons for power supply instability" by Dr Ray Ridley it says..............

"The solution to the current loop instability is well known—
add a compensating ramp. However, as shown above, it is
crucial that you don't try to use the clock ramp signal to generate
this."

Dr Ray Ridley's article can be found on  .......

http://www.switchingpowermagazine.com

....in "Articles" in the "System design" section

(Dr Ridley's article is also here
http://www.21dianyuan.com/bbs/attachments/pdf/2008/07/16/1216185133487d832d335cc.pdf
)


So what do you think?

Do we use the clock to generate the ramp or not?

 

RE: slope compensation in smps

The easy out is to design the power suppy for less than a 50% duty cycle at full load.

RE: slope compensation in smps

(OP)
thankyou, i have been tempted to do this, but the Vin is 85-265VAC......and with that constraint on duty cycle, one ends up with high peak primary currents at the low V(in) range.
-Also, a fairly high turns ratio (Np/Ns) is required which increases leakage inductance.

RE: slope compensation in smps

I think you are just going to have to live with the high turns ratio, and the big primary leakage inductance voltage spike.

One solution to that is the half bridge diagonal topology.

That at least hard clamps your peak drain voltages to something sane, especially if your load unexpectedly falls off at max duty cycle.....

I would be limiting the duty cycle to less than 50%, run it in discontinuous mode, and let sleeping dogs lie.

RE: slope compensation in smps

The slope of the clock ramp for the UC3842 get's lower and lower as pulse-width increases. You need the most slope at the highest duty cycle though.
For my power supplies I usually create a current-fed slope which gets discharged from the clock.  

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